HD6432670 Hitachi, HD6432670 Datasheet - Page 635

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
12.4
Figure 12.2 shows an overview diagram of the PPG. PPG pulse output is enabled when the
corresponding bits in P1DDR, P2DDR, and NDER are set to 1. An initial output value is
determined by its corresponding PODR initial setting. When the compare match event specified
by PCR occurs, the corresponding NDR bit contents are transferred to PODR to update the output
values. Sequential output of data of up to 16 bits is possible by writing new output data to NDR
before the next compare match.
Pulse output pin
Operation
Figure 12.2 Overview Diagram of PPG
DDR
Normal output/inverted output
Q
NDER
Q
PODR
C
Output trigger signal
D
Q
NDR
Rev. 2.0, 04/02, page 589 of 906
D
Internal data bus

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