HD6432670 Hitachi, HD6432670 Datasheet - Page 672

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
14.4
14.4.1
To use the WDT as a watchdog timer mode, set the WT/
If TCNT overflows without being rewritten because of a system crash or other error, the
This ensures that TCNT does not overflow while the system is operating normally. Software must
prevent TCNT overflows by rewriting the TCNT value (normally be writing H'00) before
overflow occurs. This
mode.
If TCNT overflows when 1 is set in the RSTE bit in RSTCSR, a signal that resets this LSI
internally is generated at the same time as the
to the
has priority and the WOVF bit in RSTCSR is cleared to 0.
The
The internal reset signal is output for 518 states.
When TCNT overflows in watchdog timer mode, the WOVF bit in RSTCSR is set to 1. If TCNT
overflows when 1 is set in the RSTE bit in RSTCSR, an internal reset signal is generated to the
entire chip.
Rev. 2.0, 04/02, page 626 of 906
Operation
Watchdog Timer Mode
signal is output.
pin occurs at the same time as a reset caused by a WDT overflow, the
signal is output for 132 states when RSTE = 1, and for 130 states when RSTE = 0.
signal can be used to reset the chip internally in watchdog timer
signal. If a reset caused by a signal input
and TME bits in TCSR to 1.
pin reset

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