HD6432670 Hitachi, HD6432670 Datasheet - Page 123

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Notes: 1. Lower 16 bits of the address.
4.3
A reset has the highest exception priority. When the
this LSI enters the reset. To ensure that this LSI is reset, hold the
power-up. To reset the chip during operation, hold the
initializes the internal state of the CPU and the registers of on-chip peripheral modules.
The chip can also be reset by overflow of the watchdog timer. For details see section 14,
Watchdog Timer.
The interrupt control mode is 0 immediately after reset.
4.3.1
When the
exception handling as follows:
1. The internal state of the CPU and the registers of the on-chip peripheral modules are
2. The reset exception handling vector address is read and transferred to the PC, and program
Figures 4.1 and 4.2 show examples of the reset sequence.
Exception Source
Internal interrupt*
initialized, the T bit is cleared to 0 in EXR, and the I bit is set to 1 in EXR and CCR.
execution starts from the address indicated by the PC.
2. Not available in this LSI.
3. For details of internal interrupt vectors, see section 5.5, Interrupt Exception Handling
Reset
Reset exception handling
#$
Vector Table.
pin goes high after being held low for the necessary time, this LSI starts reset
3
Vector Number
32
99
#$
Vector Address*
Normal Mode*
H'0040 to H'0041
H'00C6 to H'00C7
#$
pin goes low, all processing halts and
pin low for at least 20 states. A reset
#$
Rev. 2.0, 04/02, page 77 of 906
2
1
pin low for at least 20 ms at
Advanced Mode
H'0080 to H'0083
H'018C to H'018F

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