HD6432670 Hitachi, HD6432670 Datasheet - Page 36

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Figure 15.6 Example of Operation in Transmission in Asynchronous Mode
Figure 15.7 Sample Serial Transmission Flowchart ................................................................ 667
Figure 15.8 Example of SCI Operation in Reception
Figure 15.9 Sample Serial Reception Data Flowchart (1)........................................................ 670
Figure 15.9 Sample Serial Reception Data Flowchart (2)........................................................ 671
Figure 15.10 Example of Communication Using Multiprocessor Format
Figure 15.11 Sample Multiprocessor Serial Transmission Flowchart ...................................... 675
Figure 15.12 Example of SCI Operation in Reception
Figure 15.13 Sample Multiprocessor Serial Reception Flowchart (1)...................................... 677
Figure 15.13 Sample Multiprocessor Serial Reception Flowchart (2)...................................... 678
Figure 15.14 Data Format in Clocked Synchronous Communication (For LSB-First) ............. 679
Figure 15.15 Sample SCI Initialization Flowchart .................................................................. 680
Figure 15.16 Sample SCI Transmission Operation in Clocked Synchronous Mode ................. 682
Figure 15.17 Sample Serial Transmission Flowchart .............................................................. 683
Figure 15.18 Example of SCI Operation in Reception ............................................................ 684
Figure 15.19 Sample Serial Reception Flowchart ................................................................... 685
Figure 15.20 Sample Flowchart of Simultaneous Serial Transmit and Receive Operations ...... 687
Figure 15.21 Schematic Diagram of Smart Card Interface Pin Connections ............................ 688
Figure 15.22 Normal Smart Card Interface Data Format......................................................... 689
Figure 15.23 Direct Convention (SDIR = SINV = O/E = 0).................................................... 689
Figure 15.24 Inverse Convention (SDIR = SINV = O/E = 1) .................................................. 689
Figure 15.25 Receive Data Sampling Timing in Smart Card Mode
Figure 15.26 Retransfer Operation in SCI Transmit Mode ...................................................... 693
Figure 15.27 TEND Flag Generation Timing in Transmission Operation................................ 693
Figure 15.28 Example of Transmission Processing Flow........................................................ 694
Figure 15.29 Retransfer Operation in SCI Receive Mode ....................................................... 695
Figure 15.30 Example of Reception Processing Flow............................................................. 696
Figure 15.31 Timing for Fixing Clock Output Level............................................................... 696
Figure 15.32 Clock Halt and Restart Procedure ...................................................................... 697
Figure 15.33 Block Diagram of IrDA..................................................................................... 698
Figure 15.34 IrDA Transmit/Receive Operations ................................................................... 699
Figure 15.35 Example of Synchronous Transmission Using DTC........................................... 704
Figure 15.36 Sample Flowchart for Mode Transition during Transmission ............................. 706
Figure 15.37 Port Pin States during Mode Transition
Figure 15.38 Port Pin States during Mode Transition
Figure 15.39 Sample Flowchart for Mode Transition during Reception .................................. 708
Rev. 2.0, 04/02, page xxxiv of xliv
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................. 666
(Example with 8-Bit Data, Parity, One Stop Bit) .................................................. 668
(Transmission of Data H'AA to Receiving Station A)......................................... 673
(Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit)............................. 676
(Using Clock of 372 Times the Bit Rate)............................................................ 691
(Internal Clock, Asynchronous Transmission).................................................... 707
(Internal Clock, Synchronous Transmission) ...................................................... 707