HD6432670 Hitachi, HD6432670 Datasheet - Page 584

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
11.3.9
TSYR selects independent operation or synchronous operation for the TCNT counters of channels
0 to 5. A channel performs synchronous operation when the corresponding bit in TSYR is set to 1.
Bit
7
6
5
4
3
2
1
0
Rev. 2.0, 04/02, page 538 of 906
Bit Name
SYNC5
SYNC4
SYNC3
SYNC2
SYNC1
SYNC0
Timer Synchronous Register (TSYR)
Initial value
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits should always be written with 0.
Timer Synchronization 5 to 0
These bits select whether operation is independent of
or synchronized with other channels.
When synchronous operation is selected,
synchronous presetting of multiple channels, and
synchronous clearing through counter clearing on
another channel are possible.
To set synchronous operation, the SYNC bits for at
least two channels must be set to 1. To set
synchronous clearing, in addition to the SYNC bit, the
TCNT clearing source must also be set by means of
bits CCLR2 to CCLR0 in TCR.
0: TCNT_5 to TCNT_0 operates independently
(TCNT presetting /clearing is unrelated to
other channels)
1: TCNT_5 to TCNT_0 performs synchronous
operation (TCNT synchronous presetting/
synchronous clearing is possible)

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