HD6432670 Hitachi, HD6432670 Datasheet - Page 365

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

7.5.11
DMAC internal-to-external dual address transfers and single address transfers can be executed at
high speed using the write data buffer function, enabling system throughput to be improved.
When the WDBE bit of BCR in the bus controller is set to 1, enabling the write data buffer
function, dual address transfer external write cycles or single address transfers and internal
accesses (on-chip memory or internal I/O registers) are executed in parallel. Internal accesses are
independent of the bus master, and DMAC dead cycles are regarded as internal accesses.
A low level can always be output from the
output from the
bus cycle, and an external write cycle is executed in parallel with this cycle.
Figure 7.32 shows an example of burst mode transfer from on-chip RAM to external memory
using the write data buffer function.
Figure 7.33 shows an example of single address transfer using the write data buffer function. In
this example, the CPU program area is in on-chip memory.
Figure 7.32 Example of Dual Address Transfer Using Write Data Buffer Function
Internal read signal
pin if the bus cycle in which a low level is to be output from the
External address
Internal address
Write Data Buffer Function
,
ø
pin is an external bus cycle. However, a low level is not output from the
DMA
read
DMA
write
DMA
read
DMA
write
pin if the bus cycle in which a low level is to be
DMA
read
DMA
write
Rev. 2.0, 04/02, page 319 of 906
DMA
read
DMA
write
pin is an internal
DMA
dead