HD6432670 Hitachi, HD6432670 Datasheet - Page 640

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
12.4.5
Figure 12.8 shows a sample procedure for setting up non-overlapping pulse output.
Rev. 2.0, 04/02, page 594 of 906
Figure 12.8 Setup Procedure for Non-Overlapping Pulse Output (Example)
Sample Setup Procedure for Non-Overlapping Pulse Output
Compare match A
Compare match B
NDR
PODR
PPG setup
TPU setup
TPU setup
Figure 12.7 Non-Overlapping Operation and NDR Write Timing
Set non-overlapping groups
Set counting operation
Select interrupt request
Select TGR functions
Set initial output data
Enable pulse output
Select output trigger
Compare match A?
Non-overlapping
Set TGR values
Set next pulse
Set next pulse
Start counter
pulse output
output data
output data
0 output
Yes
Do not write
to NDR here
0/1 output
Write to NDR
No
Write to NDR
here
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[1] Set TIOR to make TGRA and
[2] Set the pulse output trigger period
[3] Select the counter clock source
[4] Enable the TGIA interrupt in TIER.
[5] Set the initial output values in
[6] Set the DDR and NDER bits for the
[7] Select the TPU compare match
[8] In PMR, select the groups that will
[9] Set the next pulse output values in
[10] Set the CST bit in TSTR to 1 to
[11] At each TGIA interrupt, set the next
TGRB an output compare registers
(with output disabled)
in TGRB and the non-overlap
period in TGRA.
with bits TPSC2 to TPSC0 in TCR.
Select the counter clear source
with bits CCLR2 to CCLR0.
The DTC or DMAC can also be set
up to transfer data to NDR.
PODR.
pins to be used for pulse output to
1.
event to be used as the pulse
output trigger in PCR.
operate in non-overlap mode.
NDR.
start the TCNT counter.
output values in NDR.
0 output
Do not write
to NDR here
0/1 output
Write to NDR
Write to NDR
here

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