HD6432670 Hitachi, HD6432670 Datasheet - Page 685

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Normal Serial Communication Interface Mode (When SMIF in SCMR is 0)
Bit
7
6
5
4
3
2
Bit Name
C/
CHR
PE
O/
STOP
MP

Initial Value
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Communication Mode
0: Asynchronous mode
1: Clocked synchronous mode
Character Length (enabled only in asynchronous
mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is
fixed and the MSB (bit 7) of TDR is not transmitted
in transmission.
In clocked synchronous mode, a fixed data length
of 8 bits is used.
Parity Enable (enabled only in asynchronous
mode)
When this bit is set to 1, the parity bit is added to
transmit data before transmission, and the parity
bit is checked in reception. For a multiprocessor
format, parity bit addition and checking are not
performed regardless of the PE bit setting.
Parity Mode (enabled only when the PE bit is 1 in
asynchronous mode)
0: Selects even parity.
1: Selects odd parity.
Stop Bit Length (enabled only in asynchronous
mode)
Selects the stop bit length in transmission.
0: 1 stop bit
1: 2 stop bits
In reception, only the first stop bit is checked
regardless of the STOP bit setting. If the second
stop bit is 0, it is treated as the start bit of the next
transmit character.
Multiprocessor Mode (enabled only in
asynchronous mode)
When this bit is set to 1, the multiprocessor
communication function is enabled. The PE bit
and O/
mode.
bit settings are invalid in multiprocessor
Rev. 2.0, 04/02, page 639 of 906