HD6432670 Hitachi, HD6432670 Datasheet - Page 475

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
TPU channel 0
settings
P12DDR
NDER10
Pin function
Notes: 1. TIOCC0 input when MD3 to MD0 = B'0000 and IOC3 to IOC0 = B'10xx.
TPU channel 0
settings
MD3 to MD0
IOC3 to IOC0
CCLR2, CCLR0
Output function
x: Don’t care
Note:
P12/PO10/TIOCC0/TCLKA
The pin function is switched as shown below according to the combination of the TPU channel
0 settings (by bits MD3 to MD0 in TMDR0, bits IOC3 to IOC0 in TIOR0L, and bits CCLR2
to CCLR0 in TCR0), bits TPSC2 to TPSC0 in TCR0 to TCR5, bit NDER10 in NDERH, and
bit P12DDR.
2. TCLKA input when the setting for any of TCR0 to TCR5 is TPSC2 to TPSC0 = B'100.
3. TIOCD0 output disabled.
TCLKA input when phase counting mode is set for channels 1 and 5.
Output disabled and settings (2) effective when BFA = 1 or BFB = 1 in TMDR0.
TIOCC0 output
B'0000
B'0100
B'1xxx
(1) in table
(2)
below
B'0001 to B'0011
B'0101 to B'0111
Output compare
B'0000
output
(1)
P12 input
0
TCLKA input*
B'001x
B'xx00
(2)
(2) in table below
TIOCC0 input*
P12 output
mode 1
PWM*
B'0010
B'xx00
output
Other
2
than
(1)
1
0
3
Other than B'xx00
mode 2
output
1
Other
B'101
PWM
than
Rev. 2.0, 04/02, page 429 of 906
(1)
PO10 output
B'0011
1
1
B'101
(2)

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