HD6432670 Hitachi, HD6432670 Datasheet - Page 42

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Table 6.7
Table 6.8
Table 6.9
Table 6.10
Table 6.11
Table 6.12
Table 6.13
Section 7 DMA Controller (DMAC)
Table 7.1
Table 7.3
Table 7.4
Table 7.5
Table 7.6
Table 7.7
Table 7.8
Table 7.9
Table 7.10
Table 7.11
Table 7.12
Section 8 EXDMA Controller
Table 8.1
Table 8.2
Table 8.3
Table 8.4
Section 9 Data Transfer Controller (DTC)
Table 9.1
Table 9.2
Table 9.3
Table 9.4
Table 9.5
Table 9.6
Table 9.7
Section 10 I/O Ports
Table 10.1
Table 10.2
Table 10.3
Table 10.4
Table 10.5
Table 10.6
Section 11 16-Bit Timer Pulse Unit (TPU)
Table 11.1
Rev. 2.0, 04/02, page xl of xliv
Idle Cycles in Mixed Accesses to Normal Space and DRAM Continuous
Synchronous DRAM Space ................................................................................ 242
Relation between Settings of Bits RMTS2 to RMTS0 and
Synchronous DRAM Space................................................................................ 195
Relation between Settings of Bits MXC2 to MXC0 and Address Multiplexing.... 196
Synchronous DRAM Interface Pins .................................................................... 198
DMAC Activation Sources................................................................................. 282
DMAC Transfer Modes...................................................................................... 284
DMAC Channel Priority Order........................................................................... 320
EXDMAC Transfer Modes ................................................................................ 345
EXDMAC Channel Priority Order...................................................................... 360
Interrupt Sources, DTC Vector Addresses, and Corresponding DTCEs ............... 401
Chain Transfer Conditions.................................................................................. 404
Input Pull-Up MOS States (Port A) .................................................................... 473
Input Pull-Up MOS States (Port B)..................................................................... 476
Input Pull-Up MOS States (Port C)..................................................................... 479
Input Pull-Up MOS States (Port D) .................................................................... 482
Input Pull-Up MOS States (Port E)..................................................................... 485
Setting CAS Latency.......................................................................................... 201
Pin States in Idle Cycle ...................................................................................... 245
Pin States in Bus Released State ......................................................................... 248
Pin Configuration............................................................................................... 257
Register Functions in Sequential Mode............................................................... 286
Register Functions in Idle Mode ......................................................................... 289
Register Functions in Repeat Mode .................................................................... 291
Register Functions in Single Address Mode........................................................ 294
Register Functions in Normal Mode ................................................................... 297
Register Functions in Block Transfer Mode ........................................................ 300
Interrupt Sources and Priority Order ................................................................... 324
Pin Configuration............................................................................................... 333
Interrupt Sources and Priority Order ................................................................... 388
Register Function in Normal Mode..................................................................... 404
Register Function in Repeat Mode...................................................................... 405
Register Function in Block Transfer Mode ......................................................... 406
DTC Execution Status........................................................................................ 410
Number of States Required for Each Execution Status ........................................ 410
Port Functions.................................................................................................... 418
TPU Functions................................................................................................... 502

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