HD6432670 Hitachi, HD6432670 Datasheet - Page 311

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Full Address Mode:
Bit
15
14
13
12
11
DMACR_0A and DMACR_1A
Bit Name
DTSZ
SAID
SAIDE
BLKDIR
BLKE
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
Description
Data Transfer Size
Selects the size of data to be transferred at one
time.
0: Byte-size transfer
1: Word-size transfer
Source Address Increment/Decrement
Source Address Increment/Decrement Enable
These bits specify whether source address
register MARA is to be incremented,
decremented, or left unchanged, when data
transfer is performed.
00: MARA is fixed
01: MARA is incremented after a data transfer
10: MARA is fixed
11: MARA is decremented after a data transfer
Block Direction
Block Enable
These bits specify whether normal mode or
block transfer mode is to be used for data
transfer. If block transfer mode is specified, the
BLKDIR bit specifies whether the source side or
the destination side is to be the block area.
x0: Transfer in normal mode
01: Transfer in block transfer mode (destination
side is block area)
11: Transfer in block transfer mode (source side
is block area)
When DTSZ = 0, MARA is incremented by 1
When DTSZ = 1, MARA is incremented by 2
When DTSZ = 0, MARA is decremented by
1
When DTSZ = 1, MARA is decremented by
2
Rev. 2.0, 04/02, page 265 of 906