HD6432670 Hitachi, HD6432670 Datasheet - Page 409

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
8.4.9
Normal Transfer Mode (Cycle Steal Mode): Figure 8.15 shows an example of transfer when
from external 16-bit, 2-state access space to external 16-bit, 2-state access space.
After one byte or word has been transferred, the bus is released. While the bus is released, one
CPU, DMAC, or DTC bus cycle is initiated.
Normal Transfer Mode (Burst Mode): Figure 8.16 shows an example of transfer when
output is enabled, and word-size, normal transfer mode (burst mode) is performed from external
16-bit, 2-state access space to external 16-bit, 2-state access space.
In burst mode, one-byte or one-word transfers are executed continuously until transfer ends.
Once burst transfer starts, requests from other channels, even of higher priority, are held pending
until transfer ends.
ø
Address bus
Figure 8.15 Example of Normal Transfer Mode (Cycle Steal Mode) Transfer
output is enabled, and word-size, normal transfer mode (cycle steal mode) is performed
EXDMAC Bus Cycles (Dual Address Mode)
Bus
release
DMA read DMA write
release
Bus
DMA read DMA write
release
Bus
Rev. 2.0, 04/02, page 363 of 906
DMA read DMA write
Last transfer
cycle
Bus
release

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