HD6432670 Hitachi, HD6432670 Datasheet - Page 693

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Bit
5
4
3
2
Bit Name
ORER
ERS
PER
TEND
Initial Value
0
0
0
1
R/W
R/(W)*
R/(W)*
R/(W)*
R
Description
Overrun Error
[Setting condition]
[Clearing condition]
Error Signal Status
[Setting condition]
[Clearing conditions]
Parity Error
[Setting condition]
[Clearing condition]
Transmit End
This bit is set to 1 when no error signal has been
sent back from the receiving end and the next
transmit data is ready to be transferred to TDR.
[Setting conditions]
Timing to set this bit differs according to the
register settings.
GM = 0, BLK = 0: 2.5 etu after transmission
GM = 0, BLK = 1: 1.5 etu after transmission
GM = 1, BLK = 0: 1.0 etu after transmission
GM = 1, BLK = 1: 1.0 etu after transmission
When the next serial reception is completed
while RDRF = 1
When 0 is written to ORER after reading
ORER = 1
When the low level of the error signal is
sampled
When 0 is written to ERS after reading ERS =
1
When a parity error is detected during
reception
When 0 is written to PER after reading PER =
1
When the TE bit in SCR is 0 and the ERS bit is
also 0
If the ERS bit is 0 and the TDRE bit is 1 after
the specified interval after transmission of 1-
byte data
Rev. 2.0, 04/02, page 647 of 906

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