HD6432670 Hitachi, HD6432670 Datasheet - Page 591

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Example of Synchronous Operation: Figure 11.11 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and
synchronous clearing has been set for the channel 1 and 2 counter clearing source.
Three-phase PWM waveforms are output from pins TIOCA0, TIOCA1, and TIOCA2. At this
time, synchronous presetting, and synchronous clearing by TGRB_0 compare match, is performed
for channel 0 to 2 TCNT counters, and the data set in TGRB_0 is used as the PWM cycle.
For details on PWM modes, see section 11.4.5, PWM Modes.
[1] Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous operation.
[2] When the TCNT counter of any of the channels designated for synchronous operation is written to, the
[3] Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare, etc.
[4] Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing source.
[5] Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.
same value is simultaneously written to the other TCNT counters.
<Synchronous presetting>
Synchronous presetting
Synchronous operation
Set synchronous
Set TCNT
Figure 11.10 Example of Synchronous Operation Setting Procedure
operation
selection
[1]
[2]
Synchronous clearing
<Counter clearing>
source generation
clearing source
Select counter
Start count
channel?
Clearing
Yes
No
[3]
[5]
Rev. 2.0, 04/02, page 545 of 906
<Synchronous clearing>
Set synchronous
counter clearing
Start count
[4]
[5]