HD6432670 Hitachi, HD6432670 Datasheet - Page 368

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

7.5.14
When an NMI interrupt is requested, burst mode transfer in full address mode is interrupted. An
NMI interrupt does not affect the operation of the DMAC in other modes.
In full address mode, transfer is enabled for a channel when both the DTE bit and DTME bit are
set to 1. With burst mode setting, the DTME bit is cleared when an NMI interrupt is requested.
If the DTME bit is cleared during burst mode transfer, the DMAC discontinues transfer on
completion of the 1-byte or 1-word transfer in progress, then releases the bus, which passes to the
CPU.
The channel on which transfer was interrupted can be restarted by setting the DTME bit to 1 again.
Figure 7.35 shows the procedure for continuing transfer when it has been interrupted by an NMI
interrupt on a channel designated for burst mode transfer.
7.5.15
If the DTE bit in DMABCRL is cleared to 0 for the channel currently operating, the DMAC stops
on completion of the 1-byte or 1-word transfer in progress. DMAC operation resumes when the
DTE bit is set to 1 again. In full address mode, the same applies to the DTME bit in DMABCRL.
Figure 7.36 shows the procedure for forcibly terminating DMAC operation by software.
Rev. 2.0, 04/02, page 322 of 906
Figure 7.35 Example of Procedure for Continuing Transfer on Channel Interrupted by
transfer on interrupted
DMAC and NMI Interrupts
Forced Termination of DMAC Operation
Transfer continues
Set DTME bit to 1
Resumption of
DTME = 0
DTE = 1
channel
Yes
No
[1]
[2]
NMI Interrupt
Transfer ends
[1]
[2]
Check that DTE = 1 and
DTME = 0 in DMABCRL.
Write 1 to the DTME bit.