HD6432670 Hitachi, HD6432670 Datasheet - Page 742

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

15.7.8
When the GM bit in SMR is set to 1, the clock output level can be fixed with bits CKE1 and
CKE0 in SCR. At this time, the minimum clock pulse width can be made the specified width.
Figure 15.31 shows the timing for fixing the clock output level. In this example, GM is set to 1,
CKE1 is cleared to 0, and the CKE0 bit is controlled.
Rev. 2.0, 04/02, page 696 of 906
CKE0
SCK
Clock Output Control
Figure 15.30 Example of Reception Processing Flow
No
Figure 15.31 Timing for Fixing Clock Output Level
No
Specified pulse width
RDRF flag in SSR to 0
Read RDR and clear
All data received?
Clear RE bit to 0
ORER = 0 and
Start reception
Initialization
RDRF = 1?
PER = 0
Start
Yes
Yes
Yes
No
Specified pulse width
Error processing