HD6432670 Hitachi, HD6432670 Datasheet - Page 692

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Bit
0
Note: Only 0 can be written, to clear the flag.
Smart Card Interface Mode (When SMIF in SCMR is 1)
Bit
7
6
Rev. 2.0, 04/02, page 646 of 906
Bit Name
MPBT
Bit Name
TDRE
RDRF
Initial Value
0
Initial Value
1
0
R/W
R/W
R/W
R/(W)*
R/(W)*
Description
Multiprocessor Bit Transfer
MPBT sets the multiprocessor bit to be added to
the transmit data.
Description
Transmit Data Register Empty
Indicates whether TDR contains transmit data.
[Setting conditions]
[Clearing conditions]
Receive Data Register Full
Indicates that the received data is stored in RDR.
[Setting condition]
[Clearing conditions]
The RDRF flag is not affected and retains their
previous values when the RE bit in SCR is cleared
to 0.
When the TE bit in SCR is 0
When data is transferred from TDR to TSR
When 0 is written to TDRE after reading TDRE
= 1
When the DMAC or DTC is activated by a TXI
interrupt request and transfers data to TDR
When serial reception ends normally and
receive data is transferred from RSR to RDR
When 0 is written to RDRF after reading RDRF
= 1
When the DMAC or DTC is activated by an
RXI interrupt and transferred data from RDR

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