HD6432670 Hitachi, HD6432670 Datasheet - Page 202

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
6.5
The basic bus interface enables direct connection of ROM, SRAM, and so on.
6.5.1
Data sizes for the CPU and other internal bus masters are byte, word, and longword. The bus
controller has a data alignment function, and when accessing external address space, controls
whether the upper data bus (D15 to D8) or lower data bus (D7 to D0) is used according to the bus
specifications for the area being accessed (8-bit access space or 16-bit access space) and the data
size.
8-Bit Access Space: Figure 6.8 illustrates data alignment control for the 8-bit access space. With
the 8-bit access space, the upper data bus (D15 to D8) is always used for accesses. The amount of
data that can be accessed at one time is one byte: a word access is performed as two byte accesses,
and a longword access, as four byte accesses.
Rev. 2.0, 04/02, page 156 of 906
Basic Bus Interface
Data Size and Data Alignment
Address bus
ø
Figure 6.7
$ $3 3
Signal Output Timing (n = 0 to 7)
T
1
Area n external address
Bus cycle
T
2
T
3

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