HD6432670 Hitachi, HD6432670 Datasheet - Page 653

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Bit
4
3
2
1
0
Note: Only 0 can be written to bits 7 to 5, to clear these flags.
13.4
13.4.1
Figure 13.2 shows an example that the 8-bit timer is used to generate a pulse output with a
selected duty cycle. The control bits are set as follows:
[1] In TCR, bit CCLR1 is cleared to 0 and bit CCLR0 is set to 1 so that the timer counter is
[2] In TCSR, bits OS3 to OS0 are set to B'0110, causing the output to change to 1 at a TCORA
With these settings, the 8-bit timer provides output of pulses at a rate determined by TCORA with
a pulse width determined by TCORB. No software intervention is required.
cleared at a TCORA compare match.
compare match and to 0 at a TCORB compare match.
Bit Name
OS3
OS2
OS1
OS0
Operation
Pulse Output
Initial Value
1
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R
Description
Reserved
This bit is always read as 1 and cannot be
modified.
Output Select 3 and 2
These bits select a method of TMO pin output
when compare match B of TCORB and TCNT
occurs.
00: No change when compare match B occurs
01: 0 is output when compare match B occurs
10: 1 is output when compare match B occurs
11: Output is inverted when compare match B
occurs (toggle output)
Output Select 1 and 0
These bits select a method of TMO pin output
when compare match A of TCORA and TCNT
occurs.
00: No change when compare match A occurs
01: 0 is output when compare match A occurs
10: 1 is output when compare match A occurs
11: Output is inverted when compare match A
occurs (toggle output)
Rev. 2.0, 04/02, page 607 of 906

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