HD6432670 Hitachi, HD6432670 Datasheet - Page 191

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Bit
9
8
7 to 4
3
2
1
0
Bit Name
RCD1
RCD0
—
CKSPE
—
RDXC1
RDXC0
Initial Value
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
RAS-CAS Wait Control
These bits select a wait cycle to be inserted
between the
cycle. A 1- to 4-state wait cycle can be inserted.
00: Wait cycle not inserted
01: 1-state wait cycle inserted
10: 2-state wait cycle inserted
11: 3-state wait cycle inserted
Reserved
These bits can be read from or written to.
However, the write value should always be 0.
Clock Suspend Enable
Enables clock suspend mode for extend read
data during DMAC and EXDMAC single
address transfer with the synchronous DRAM
interface.
0: Disables clock suspend mode
1: Enables clock suspend mode
Reserved
This bit can be read from or written to. However,
the write value should always be 0.
Read Data Extension Cycle Number Selection
Selects the number of read data extension cycle
(Tsp) insertion state in clock suspend mode.
These bits are valid when the CKSPE bit is set
to 1.
00: Inserts 1state
01: Inserts 2state
10: Inserts 3state
11: Inserts 4state
5$6
Rev. 2.0, 04/02, page 145 of 906
assert cycle and
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