HD6432670 Hitachi, HD6432670 Datasheet - Page 348

• Manufacturer Part Number: HD6432670
• Description: (HD64F267x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

ETCRAL is decremented by 1 each time a byte or word transfer is performed. In response to a
single transfer request, burst transfer is performed until the value in ETCRAL reaches H'00.
ETCRAL is then loaded with the value in ETCRAH. At this time, the value in the MAR register
for which a block designation has been given by the BLKDIR bit in DMACRA is restored in
accordance with the DTSZ, SAID/DAID, and SAIDE/DAIDE bits in DMACR.
ETCRB is decremented by 1 after every block transfer, and when the count reaches H'0000 the
DTE bit in DMABCRL is cleared and transfer ends. If the DTIE bit in DMABCRL is set to 1 at
this point, an interrupt request is sent to the CPU or DTC.
Rev. 2.0, 04/02, page 302 of 906
Address T
Address B
Legend
Address
Address
Address
Address
Where :
A
A
T
T
B
B
L
L
N
M
A
B
A
B
A
B
= L
= L
= L
= L
= Value set in MARA
= Value set in MARB
= Value set in ETCRB
= Value set in ETCRAH and ETCRAL
Figure 7.14 Operation in Block Transfer Mode (BLKDIR = 1)
A
B
A
B
+ SAIDE · (–1)
+ DAIDE · (–1)
Block area
SAID
DAID
· (2
· (2
DTSZ
DTSZ
Consecutive transfer
of M bytes or words
is performed in
response to one
request
· (N – 1))
· (M·N – 1))
Transfer
2nd block
1st block
Nth block
Address T
Address B
B
B