HD6432670 Hitachi, HD6432670 Datasheet - Page 806

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HD6432670

Manufacturer Part Number
HD6432670
Description
(HD64F267x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
19.7
Making a setting in the RAM emulation register (RAMER) enables RAM to be overlapped onto
the part of flash memory area so that data to be programmed to flash memory can be emulated in
the on-chip RAM in real time. Emulation can be performed in user mode or user program mode.
Figure 19.8 shows an example of emulation of real-time flash memory programming.
1. Set RAMER to overlap RAM onto the area for which real-time programming is required.
2. Emulation is performed using the overlapping RAM.
3. After the program data has been confirmed, the RAMS bit is cleared, thus releasing RAM
4. The data written in the overlapping RAM is written into the flash memory space (EB0).
Example in which flash memory block is overlapped is shown in figure 19.9.
1. The RAM area to be overlapped is fixed at a 4-kbyte area in the range of H’FFA000 to
2. The flash memory area to overlap is selected by RAMER from a 4-kbyte area among one of
Rev. 2.0, 04/02, page 760 of 906
overlap.
H’FFAFFF.
the EB0 to EB7 blocks.
Flash Memory Emulation in RAM
Figure 19.8 Flowchart for Flash Memory Emulation in RAM
No
Execute application program
Write tuning data to overlap
Start of emulation program
End of emulation program
Write to flash memory
emulation block
Clear RAMER
Set RAMER
Tuning OK?
RAM
Yes

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