UPD78F1146AGB-GAH-AX Renesas Electronics America, UPD78F1146AGB-GAH-AX Datasheet - Page 515

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UPD78F1146AGB-GAH-AX

Manufacturer Part Number
UPD78F1146AGB-GAH-AX
Description
MCU 16BIT 78K0R/KX3 64-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3r
Datasheet

Specifications of UPD78F1146AGB-GAH-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1146AGB-GAH-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
D
MSTS0 = 1?
IICBSY = 0?
STCF = 0?
STT0 = 1
STT0 = 1
Wait
Wait
A
C
B
C
Yes
Yes
Yes
Figure 12-25. Master Operation in Multi-Master System (2/3)
Enables reserving communication.
Disables reserving communication.
Wait state after stop condition
was detected and start condition
was generated by the communication
reservation function.
No
No
No
Prepares for starting communication
(generates a start condition).
Secure wait time by software
(see Table 12-7).
Prepares for starting communication
(generates a start condition).
Secure wait time by software
(see Table 12-7).
CHAPTER 12 SERIAL INTERFACE IIC0
User’s Manual U17854EJ9V0UD
No
EXC0 = 1 or COI0 =1?
EXC0 = 1 or COI0 =1?
interrupt occurs?
interrupt occurs?
Slave operation
Slave operation
INTIIC0
INTIIC0
Yes
Yes
Yes
Yes
No
No
No
Waits for bus release
(communication being reserved).
Waits for bus release
Detects a stop condition.
D
513

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