DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 150

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 5 Interrupt Controller
Interrupt Acceptance Control: In interrupt control mode 0, interrupt acceptance is controlled by
the I bit in CCR.
Table 5.4 shows the interrupts selected in each interrupt control mode.
Table 5.4
Legend:
X:
8-Level Control: In interrupt control mode 2, 8-level mask level determination is performed for
the selected interrupts in interrupt acceptance control according to the interrupt priority level
(IPR).
The interrupt source selected is the interrupt with the highest priority level, and whose priority
level set in IPR is higher than the mask level.
Table 5.5
Default Priority Determination: When an interrupt is selected by 8-level control, its priority is
determined and a vector number is generated.
If the same value is set for IPR, acceptance of multiple interrupts is enabled, and so only the
interrupt source with the highest priority according to the preset default priorities is selected and
has a vector number generated. Interrupt sources with a lower priority than the accepted interrupt
source are held pending.
Table 5.6 shows operations and control signal functions in each interrupt control mode.
Rev. 6.00 Sep. 24, 2009 Page 102 of 928
REJ09B0099-0600
Interrupt Control Mode
0
2
Interrupt Control Mode
0
2
Don't care
Interrupts Selected in Each Interrupt Control Mode (1)
Interrupts Selected in Each Interrupt Control Mode (2)
Selected Interrupts
All interrupts
Highest priority-level (IPR) interrupt whose priority level is greater
than the mask level (IPR > I2 to I0)
Interrupt Mask Bits
I
0
1
X
Selected Interrupts
All interrupts
NMI interrupt
All interrupts