DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 362

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
Example of Synchronous Operation: Figure 10.11 shows an example of synchronous operation.
In this example, synchronous operation and PWM mode 1 have been designated for channels 0 to
2, TGRB_0 compare match has been set as the channel 0 counter clearing source, and
synchronous clearing has been set for the channel 1 and 2 counter clearing source.
Three-phase PWM waveforms are output from pins TIOCA0, TIOCA1, and TIOCA2. At this
time, synchronous presetting, and synchronous clearing by TGRB_0 compare match, are
performed for channel 0 to 2 TCNT counters, and the data set in TGRB_0 is used as the PWM
cycle.
For details of PWM modes, see section 10.4.5, PWM Modes.
Rev. 6.00 Sep. 24, 2009 Page 314 of 928
REJ09B0099-0600
[1]
[2]
[3]
[4]
[5]
<Synchronous presetting>
Synchronous presetting
Synchronous operation
Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous
operation.
When the TCNT counter of any of the channels designated for synchronous operation is
written to, the same value is simultaneously written to the other TCNT counters.
Use the CCLR2 to CCLR0 bits in TCR to specify TCNT clearing by input capture/output compare,
etc.
Use the CCLR2 to CCLR0 bits in TCR to designate synchronous clearing for the counter clearing
source.
Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.
Figure 10.10 Example of Synchronous Operation Setting Procedure
Set synchronous
Set TCNT
operation
selection
[1]
[2]
Synchronous clearing
<Counter clearing>
source generation
clearing source
Select counter
Start count
channel?
Clearing
Yes
No
[3]
[5]
<Synchronous clearing>
Set synchronous
counter clearing
Start count
[4]
[5]