DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 639

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

17.4.2
This section describes an example of performing a slave reception using the DTC.
(1)
(a) Setting the IEBus Control Register (IECTR)
(b) Setting the IEBus Master Unit Address Registers 1 and 2 (IEAR1 and IEAR2)
Enable the IEBus pins, select the signal polarity, and select a clock supplied to the IEB. Set the
RE bit to 1 to perform reception. The LUEE bit does not need to be specified.
IEB Initialization
must be enabled. If an error termination interrupt is disabled, no interrupt is generated
even if the transmission is terminated by an error.
Interrupt
IETxI (TxRDY)
(TO DTC)
IETxI (TxRDY)
(TO CPU)
IETSI
(TO CPU)
IECMR
IEFLG
IETSR
TxRDY
Slave Receive Operation
MRQ
CMX
SRQ
SRE
TxS
TxF
LF
Slave reception
Cleared to 0 byt DTC transfer of 1st byte
(1)
H: Header, MA: Master address field, SA: Slave address field,
CF: Control field, LF: Message length field, D1, D2,..., Dn-1, Dn: Data field
Master transmission request
Figure 17.8 Master Transmit Operation Timing
Dn-1
Dn
(2)
(2)
H
MA
(3)
(3)
SA
Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
CF
DTC transfer
Master transmission
of 2nd byte
LF
(4)
(4)
D1
Rev. 6.00 Sep. 24, 2009 Page 591 of 928
(5)
(5)
DTC transfer
of 3rd byte
D2
(6)
(6)
(7)
DTC transfer
Dn-1
of nth byte
REJ09B0099-0600
Dn
(8)
(8)