DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 626

IC H8S/2505 MCU FLASH 176-LFBGA

DF2505BR26DV

Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
Rev. 6.00 Sep. 24, 2009 Page 578 of 928
REJ09B0099-0600
Bit
0
Bit Name
TxE
0
Initial
Value
R/W
R/W
Transmit Error Completion
Description
Indicates that data for the number of bytes specified by the
message length bits is not completed and that the data
transmission is terminated. The source of this error can be
checked by the contents of IETEF. This flag is set at the
timing that an error indicated by IETEF occurs. The TxE
flag can be cleared even when the error source flag in
IETEF is set to 1 because the TxE flag is not logically
ORed with the flags in IETEF.
In master reception, an error (arbitration loss, timing error,
or NAK reception) generated after a master
communications command is issued before master
reception starts will be detected as a transmit error.
[Setting condition]
[Clearing condition]
When the data for the number of bytes specified by the
message length bits is not completed and when the
transmission is terminated
When writing 0 after reading TxE = 1

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