DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 733

IC H8S/2505 MCU FLASH 176-LFBGA

DF2505BR26DV

Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3. Programming
4. Erasing
These items use different parameters. The correspondence table is shown in table 20.5. The
meaning of the bits in FPFR varies in each processing program: initialization, programming, or
erasure. For details, see descriptions of FPFR for each process.
Table 20.5 Parameters and Target Modes
Note: A single byte of the start address to download an on-chip program, which is specified by
(1)
The on-chip program is automatically downloaded by setting the SCO bit to 1. The on-chip RAM
area to be downloaded is the 2-kbyte area starting from the address specified by FTDAR. For the
address map of the on-chip RAM, see figure 20.10.
Download control is set by the programming/erasing interface registers, and the DPFR parameter
indicates the return value.
Name of
Parameter
Download pass
and fail result
Flash pass and fail
result
Flash
programming/
erasing frequency
control
Flash user branch
address set
parameter
Flash multi-
purpose address
area
Flash multi-
purpose data
destination area
Flash erase block
select
Download Control
FTDAR.
Abbrevia-
tion
DPFR
FPFR
FPEFEQ
FUBRA
FMPAR
FMPDR
FEBS
Down
Load
Initializa-
tion
Program-
ming
Erasure
Rev. 6.00 Sep. 24, 2009 Page 685 of 928
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Section 20 Flash Memory
Initial
Value
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
REJ09B0099-0600
Alloca-
tion
On-chip
RAM*
R0L of
CPU
ER0 of
CPU
ER1 of
CPU
ER1 of
CPU
ER0 of
CPU
ER0 of
CPU

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