DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 519

IC H8S/2505 MCU FLASH 176-LFBGA

DF2505BR26DV

Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.9.7
• Problem in Operation: When DDR and DR are set to 1, SCI clock output is used in clocked
1. End of serial data transmission
2. TE bit = 0
3. C/A bit = 0 ... switchover to port output
4. Occurrence of low-level output (see figure 13.38)
synchronous mode, and the SCK pin is changed to the port pin while transmission is ended,
port output is enabled after low-level output occurs for one half-cycle.
When switching the SCK pin to the port pin by making the following settings while DDR = 1,
DR = 1, C/A = 1, CKE1 = 0, CKE0 = 0, and TE = 1, low-level output occurs for one half-
cycle.
Notes when Switching from SCK Pin to Port Pin
Figure 13.37 Sample Flowchart for Mode Transition during Reception
Read receive data in RDR
Read RDRF flag in SSR
Transition to software
<Start of reception>
standby mode, etc.
standby mode, etc.
Exit from software
operating mode?
Yes
Yes
<Reception>
Initialization
RDRF = 1
Change
RE = 0
No
No
RE = 1
[1]
[2]
[1] Receive data being received
[2] Includes module stop mode
Section 13 Serial Communication Interface (SCI)
becomes invalid.
and watch mode.
Rev. 6.00 Sep. 24, 2009 Page 471 of 928
REJ09B0099-0600

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