DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 592

IC H8S/2505 MCU FLASH 176-LFBGA

DF2505BR26DV

Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
(1)
Header is comprised of a start bit and a broadcast bit.
(a) Start Bit
(b) Broadcast Bit
Rev. 6.00 Sep. 24, 2009 Page 544 of 928
REJ09B0099-0600
Note: The value of acknowledge bit is ignored in broadcast communications.
The start bit is a signal for informing a start of data transfer to other units. A unit, which
attempts to start data transfer, outputs a low-level signal (start bit) for a specified period and
then outputs the broadcast bit.
If another unit is already outputting a start bit when a unit attempts to output a start bit, the unit
waits for completion of output of the start bit from the other unit without outputting the start
bit, and then outputs the broadcast bit synchronized with the completion timing.
Other units enter the receive state after detecting the start bit.
The broadcast bit is a bit to identify the type of communications: broadcast or normal.
When this bit is cleared to 0, it indicates the broadcast communications. When it is set to 1, it
indicates the normal communications. Broadcast communications includes group broadcast
and general broadcast, which are identified by a value of the slave address. (For details of the
slave address, see section 17.1.2 (3), Slave Address Field.)
Since there are multiple slave units, which are communications destination units, in the case of
broadcast communications, the acknowledge bit is not returned from each field described in (b)
and below.
Field name
Transfer
Number
Mode 0
Mode 1
Mode 2
Header
of bits
time
Start
P: Parity bit (1 bit)
A: Acknowledge bit (1 bit)
N: Number of bytes
bit
Header
1
When A = 0: ACK
When A = 1: NAK
Broad-
cast
bit
1
address field
address
Master
Master
12
Figure 17.2 Transfer Signal Format
1
P
Approximately 7330 μs
Approximately 2090 μs
Approximately 1590 μs
Slave address
address
Slave
12
field
P A
1
1
Control
Control field
bits
4
P A
1
1
Message
length
length field
8
bits
Message
1
P A
1
Data
(When φ = 12, 18, or 24MHz)
bits
8
Approximately 1590 × N μs
Approximately 410 × N μs
Approximately 300 × N μs
1
P A
Data field
1
Data
bits
8
1
P A
1

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