DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 608

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
17.3.2
IECMR issues commands to control IEB communications. Since this register is a write-only
register, bit-manipulation instructions should not be used when writing. See section 2.9.4, Access
Method for Registers with Write-only Bits.
Notes: 1. Do not execute this command in slave communications. Execute this command after
Rev. 6.00 Sep. 24, 2009 Page 560 of 928
REJ09B0099-0600
Bit
7 to 3 ⎯
2
1
0
2. This command is valid during master communications (MRQ = 1). In other states, this
Bit Name
CMD2
CMD1
CMD0
IEBus Command Register (IECMR)
slave communications ends or in master communications. If this command is issued in
slave communications, this command is ignored.
command issuance is ignored. If this command is issued in master communications, the
communications controller immediately enters the wait state. At this time, the issued
master transmission request ends (MRQ = 0).
Initial
Value
All 0
0
0
0
R/W
⎯
W
W
W
Description
Reserved
The read value is undefined. In order to avoid
malfunction, do not use bit manipulation instructions.
These bits cannot be modified.
Command Bits
These bits issue a command to control IEB
communications. When the CMX flag in IEFLG is set after
the command issuance, the command is indicated to be in
execution. When the CMX flag becomes 0, the operation
state is entered. The read value is undefined. Do not use
a bit manipulation instruction that causes malfunction.
000: No operation. Operation is not affected.
001: Unlock (required from other units)*
010: Requires communications as the master
011: Stops master communications*
100: Undefined bits. Operation is not affected by this
101: Requires data transfer from the slave.
110: Stops data transfer from the slave*
111: Undefined bits. Operation is not affected by this
command.
command.
2
1
3
.