DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 765

IC H8S/2505 MCU FLASH 176-LFBGA

DF2505BR26DV

Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The difference between the erasing procedures in user program mode and user boot mode depends
on whether the MAT is switched or not as shown in figure 20.15.
MAT switching is enabled by writing a specific value to FMATS. However note that while the
MATs are being switched, the LSI is in an unstable state, e.g. access to a MAT is not allowed until
MAT switching is completed, and if an interrupt occurs, from which MAT the interrupt vector is
read is undetermined. Perform MAT switching in accordance with the description in section 20.7,
Switching between User MAT and User Boot MAT.
Except for MAT switching, the erasing procedure is the same as that in user program mode.
The area that can be executed in the steps of the user procedure program (on-chip RAM and user
MAT) is shown in section 20.4.4, Procedure Program and Storable Area for Programming Data.
and bus master operation
JSR FTDAR setting + 32
Select on-chip program
Figure 20.15 Procedure for Erasing User MAT in User Boot Mode
Set the FPEFEQ and
Set FKEY to H'A5
Set SCO to 1 and
execute download
to be downloaded
FUBRA parameters
procedure program
Disable interrupts
Clear FKEY to 0
other than CPU
DPFR = 0 ?
Start erasing
Initialization
FPFR = 0 ?
1
Yes
Yes
Initialization error processing
Download error processing
No
No
User-boot-MAT
selection state
Note: The MAT must be switched by FMATS to perform
the erasing error processing in the user boot MAT.
No
than H'AA to select user MAT
JSR FTDAR setting + 16
Set FMATS to H'AA to
Set FMATS to value other
Rev. 6.00 Sep. 24, 2009 Page 717 of 928
select user boot MAT
Set FEBS parameter
procedure program
Set FKEY to H'A5
Clear FKEY to 0
block erasing is
Programming
End erasing
FPFR = 0 ?
completed?
Required
1
Yes
Yes
Clear FKEY and erasing
Section 20 Flash Memory
No
error processing
REJ09B0099-0600
switchover
switchover
MAT
MAT

Related parts for DF2505BR26DV