DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 596

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 17 IEBus™ Controller (IEB) [H8S/2552 Group]
(6)
The data field is a field for data transmission/reception to the slave unit. The master unit
transmits/receives data to/from the slave unit using the data field. The data field is comprised of
data bits, a parity bit, and an acknowledge bit.
The data bits include eight bits and are output MSB first.
The parity bit and acknowledge bit following the data bits are output from the master unit and
slave unit, respectively.
Broadcast communications are performed only for the transmission of the master unit. In this case,
the acknowledge bit is ignored. Operations in master transmission and master reception are
described below.
(a) Master Transmission
(b) Master Reception
Rev. 6.00 Sep. 24, 2009 Page 548 of 928
REJ09B0099-0600
The master unit transmits the data bits and parity bit to the slave unit to write data from the
master unit to the slave unit. The slave unit receives the data bits and parity bit, and returns the
acknowledgement if the parity bit is correct and the receive buffer is empty. If the parity bit is
not correct or the receive buffer is not empty, the slave unit rejects acceptance of
corresponding data and does not return the acknowledgement.
When the slave unit does not return the acknowledgement, the master unit retransmits the same
data. This operation is repeated until either the acknowledgement from the slave unit is
detected or the maximum number of data transfer bytes is exceeded.
When the parity is correct and the acknowledgement is output from the slave unit, the master
unit transmits the subsequent data if data remains and the maximum number of transfer bytes
is not exceeded.
In the case of broadcast communications, the slave unit does not return the acknowledgement,
and the master unit transfers data byte by byte.
The master unit outputs synchronous signals corresponding to all data bits to be read from the
slave unit.
The slave unit outputs the data bits and parity bit on the bus in accordance with the
synchronous signals from the master unit.
Data Field