DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 848

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 Power-Down Modes
22.3
22.3.1
When the SLEEP instruction is executed while the SSBY bit in SBYCR = 0 and the LSON bit in
LPWRCR = 0, the CPU enters sleep mode. In sleep mode, CPU operation stops but the contents of
the CPU's internal registers are retained. Other peripheral modules do not stop.
22.3.2
Sleep mode is cleared by any interrupt, or signals at the RES, MRES, or STBY pin.
• Clearing with an interrupt
• Clearing with the RES pin or MRES pin
• Clearing with the STBY Pin
Rev. 6.00 Sep. 24, 2009 Page 800 of 928
REJ09B0099-0600
Bus master clock
Internal address bus
peripheral module clock
Internal write signal
,
When an interrupt occurs, sleep mode is cleared and interrupt exception processing starts.
Sleep mode is not cleared if the interrupt is disabled, or interrupts other than NMI are masked
by the CPU.
Setting the RES pin or the MRES pin level low selects the reset state. After the stipulated reset
input duration, driving the RES pin or MRES pin high starts the CPU performing reset
exception processing.
When the STBY pin is driven low, a transition is made to hardware standby mode.
Sleep Mode
Transition to Sleep Mode
Clearing Sleep Mode
Figure 22.2 Medium-Speed Mode Transition and Clearance Timing
SCKCR
Medium-speed mode
SCKCR