DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 523

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI includes 2-channel I
The I
interface functions. For the bus drive characteristics and the I
Electrical Characteristics. The register configuration that controls the I
the Philips configuration, however.
Figure 14.1 shows a block diagram of the I
Figure 14.2 shows an example of I/O pin connections to external circuits.
14.1
• Selection of I
• Continuous transmission/reception
• Module stop mode can be set.
I
• Start and stop conditions generated automatically in master mode
• Selection of acknowledge output levels when receiving
• Automatic loading of acknowledge bit when transmitting
• Bit synchronization/wait function
• Six interrupt sources
2
C bus format
Since the shift register, transmit data register, and receive data register are independent from
each other, the continuous transmission/reception can be performed.
In master mode, the state of SCL is monitored per bit, and the timing is synchronized
automatically.
If transmission/reception is not yet possible, set the SCL to low until preparations are
completed.
Transmit data empty (including slave-address match), transmit end, receive data full (including
slave-address match), arbitration lost, NACK detection, and stop condition detection
2
C bus interface 2 conforms to and provides a subset of the Philips I
Features
2
C format or clocked synchronous serial format
Section 14 I
2
C bus interface.
2
C Bus Interface 2 (IIC2)
2
C bus interface 2.
2
Rev. 6.00 Sep. 24, 2009 Page 475 of 928
C bus timing, see section 24,
Section 14 I
2
C bus differs partly from
2
C bus (inter-IC bus)
2
C Bus Interface 2 (IIC2)
REJ09B0099-0600