DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 161

IC H8S/2505 MCU FLASH 176-LFBGA

DF2505BR26DV

Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
The same also applies when an interrupt source flag is cleared to 0.
The above contention will not occur, if an enable bit or interrupt source flag is cleared to 0 while
the interrupt is masked.
Figure 5.9 shows an example in which the CMIEA bit in the TCR register of the 8-bit timer is
cleared to 0.
5.6.2
The instructions that disable interrupt requests directly after execution are LDC, ANDC, ORC,
and XORC. After any of these instructions are executed, all interrupts including NMI are disabled
and the next instruction is always executed.
When the I bit is set by one of these instructions, the new value becomes valid two states after
execution of the instruction ends.
5.6.3
There are times when interrupt acceptance is disabled by the interrupt controller.
Instructions That Disable Interrupts
When Interrupts Are Disabled
Internal
address bus
Internal
write signal
CMIEA
CMFA
CMIA
interrupt signal
Figure 5.9 Contention between Interrupt Generation and Disabling
φ
TCR write cycle by CPU
TCR address
Rev. 6.00 Sep. 24, 2009 Page 113 of 928
CMIA exception handling
Section 5 Interrupt Controller
REJ09B0099-0600

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