DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 303

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• PF0/BREQ/IRQ2
Note:
9.14
Port G is a 5-bit I/O port and has the following registers.
• Port G data direction register (PGDDR)
• Port G data register (PGDR)
• Port G register (PORTG)
9.14.1
PGDDR specifies input or output the port G pins using the individual bits. PGDDR cannot be
read; if it is, the read value is undefined. Since this register is a write-only register, bit-
manipulation instructions should not be used when writing. See section 2.9.4, Access Method for
Registers with Write-only Bits.
Note:
Operating mode
BRLE
PF0DDR
Pin function
Bit
7 to 5
4
3
2
1
0
The pin function is switched as shown below according to the combination of the operating
mode, the BRLE bit, and the PF0DDR bit.
*
*
Bit Name
⎯
PG4DDR
PG3DDR*
PG2DDR*
PG1DDR
PG0DDR
Port G
Port G Data Direction Register (PGDDR)
When this port is used as an external interrupt pin, do not specify other functions.
Reserved in the H8S/2556 Group. This bit is set to 0.
PF0 input
Initial Value R/W
Undefined
0
0
0
0
0
0
0
⎯
W
W
W
W
W
PF0 output
Mode 6
1
Description
Reserved
These bits are always read as undefined value and
cannot be modified.
When a pin is specified as a general purpose I/O
port, setting these bits to 1 makes the corresponding
port G pin an output pin. Clearing this bit to 0 makes
the pin an input pin.
BREQ input
IRQ2 input*
⎯
1
Rev. 6.00 Sep. 24, 2009 Page 255 of 928
PF0 input
0
Mode 7
Section 9 I/O Ports
⎯
REJ09B0099-0600
PF0 output
1