DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 736

IC H8S/2505 MCU FLASH 176-LFBGA

DF2505BR26DV

Manufacturer Part Number
DF2505BR26DV
Description
IC H8S/2505 MCU FLASH 176-LFBGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2500r
Datasheets

Specifications of DF2505BR26DV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
26MHz
Connectivity
I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
104
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2505BR26DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 20 Flash Memory
(b) Flash user branch address setting parameter (FUBRA: General register ER1 of CPU)
This parameter sets the user branch destination. Set user program is executed in a specified unit
during programming/erasure.
Rev. 6.00 Sep. 24, 2009 Page 688 of 928
REJ09B0099-0600
Bit
31 to 0 UA31 to
Bit Name
UA0
Initial
Value
R/W
R/W
Description
User Branch Destination Address
When no user branch is required, set address 0
(H'00000000). The user branch destination should be the
RAM space or external bus space to which on-chip
program is not transferred. Be careful not to branch to the
area without execution codes, or runaway or destruction
of the on-chip program area or the stack area is caused.
In case of runaway, the value of flash memory is not
guaranteed.
During the processing in the user branch destination, do
not download or initialize the on-chip program or initiate
programming/erasing program. Programming/erasing at
the return from the user branch destination is not
guaranteed. In addition, do not modify the data prepared
to be programmed. Also during the processing in the user
branch destination, do not modify the
programming/erasing interface register or make transition
to RAM emulation mode. After the user branch
processing has completed, use the RTS instruction to
return to programming/erasing program.

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