DF2505BR26DV Renesas Electronics America, DF2505BR26DV Datasheet - Page 355

• Manufacturer Part Number: DF2505BR26DV
• Description: IC H8S/2505 MCU FLASH 176-LFBGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2500r

Specifications of DF2505BR26DV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 26MHz
• Connectivity: I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 104
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 176-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4
10.4.1
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, synchronous counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
Counter Operation: When one of the CST0 to CST5 bits is set to 1 in TSTR, the TCNT counter
for the corresponding channel begins counting. TCNT can operate as a free-running counter,
periodic counter, for example.
1. Example of count operation setting procedure
Figure 10.2 shows an example of the count operation setting procedure.
Select output compare register
Select counter clearing source
Operation
Basic Functions
Start count operation
Select counter clock
Operation selection
<Periodic counter>
Periodic counter
Set period
Figure 10.2 Example of Counter Operation Setting Procedure
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count operation
Rev. 6.00 Sep. 24, 2009 Page 307 of 928
Section 10 16-Bit Timer Pulse Unit (TPU)
[5]
[1]
[2]
[3]
[4]
[5]
Select the counter
clock with the TPSC2 to
TPSC0 bits in
TCR. At the same
time, select the
input clock edge
with the CKEG1 and CKEG0
bits in TCR.
For periodic counter
operation, select the
TGR to be used as
the TCNT clearing
source with the CCLR2 to
CCLR0 bits in TCR.
Designate the TGR
selected in [2] as an
output compare
register by means of
TIOR.
Set the periodic
counter cycle in the
TGR selected in [2].
Set the CST bit in
TSTR to 1 to start
the counter operation.
REJ09B0099-0600