mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 117

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

Bit
2
1
0
MFREFR
TxSYNC
Name
JTS
(0)
(0)
(0)
MultiFrame Reframe. Only applicable in D4 mode. Setting this bit causes an automatic
multiframe reframe. The signaling bits are frozen until multiframe synchronization is achieved.
Terminal frame synchronization is not affected.
Japan Telecom Synchronization. If this bit is set, the S-bit is included in the CRC6 calculation
for the ESF framing Mode.
Transmit Synchronization. Setting this bit causes the transmit multiframe boundary to be
internally synchronized to the incoming S-bits on DSTi channel 31 bit 0.
Table 63 - Framing Mode Select (R/W Address Y00) (T1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
117
Data Sheet