mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 127

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

15-10
15-3
7 - 0
Bit
Bit
Bit
2
1
0
2
1
0
9
8
T1DRR
T1DRY
Name
RxBOM7 - 0
LLDD
RxBOMM
Name
(0)
(0)
1SEC
2SEC
RxBOM
Name
#
#
#
Line Loopback Disable Detect. This bit will be set when a framed or unframed repeating
pattern of 001 has been detected during a 48 millisecond interval. Up to fifteen errors are
permitted per integration period. Note that the code detected is dependent on Receive
Loopback Deactivate Code Match (YF0).
T1DM Received R bit. This bit is used for AT&T 8 KB/s communications channel. This bit
will be received in bit 1 of timeslot 24 of the receive PCM24 stream in T1DM mode.
T1DM Received Yellow Alarm. If this bit is 0 a T1DM yellow alarm has been detected in bit
2 of timeslot 24 of the receive PCM24 stream in T1DM mode.
not used.
One Second Timer Status. This bit changes state once every 1 second.
Two Second Timer Status. This bit changes state once every 2 seconds and is
synchronous with the 1 SEC timer.
not used.
Table 79 - Synchronization and Alarm Status Word(Y10) (T1)
not used.
Bit Oriented Message Received. This bit is set when a Received Bit Oriented
Message is received.
Receive Bit Oriented Match. This bit is set if there is a match between the Received
Bit Oriented Message and Receive Bit oriented Match register.
Receive Bit Oriented Message. This is the bit oriented message received. This
register is updated after 8 out of 10 messages are received.
Table 81 - Receive Bit Oriented Message(Y12) (T1)
Table 80 - Timer Status Word(Y11) (T1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
127
Functional Description
Functional Description
Data Sheet