mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 123

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

15-8
7-0
15-8
15-8
7-0
15-10
Bit
7-0
Bit
Bit
9-5
4-0
Bit
RXBOM
TXIDC
Name
Name
RXIDC
Name
M7-0
CST(4:0)
(00000)
PCM(4:0)
(00000)
7-0
(0)
(0)
7-0
(0)
#
#
Name
#
#
not used.
Transmit Idle Code. This is the idle code that is sent on the PCM24 channels if the per timeslot
control bit MPDT is set(Y90-YA7).
not used.
Receive Bit Oriented Message Match. The contents of this register are compared to the
received bit oriented message register(RXBOM) and an option maskable interrupt is generated if
the contents match the received bit oriented message. Note that in accordance to T1.403 Table
11 the codeword 7E should not be used due to similarity of DataLink idle code. The code 7E will
not be detected by the MT9072.
not used.
Receive Idle Code. This is the idle code that is sent on the DSTo channels if the per timeslot
control bit MPDR is set(Y90-YA7).
not used.
CST Map Channel. This is the CSTi/o channel which will be used as a source/destination to
be mapped to the PCM24 channel. The possible values are 0 to 23 for channels 0 to 23 of the
CSTi/o streams.
PCM Map Channel. This is the PCM24 timeslot which will be used as a source/destination to
be mapped to the CSTi/o channel. The possible values are 0 to 23 for timeslots 0 to 23 of the
PCM24 stream.
Table 71 - Receive Bit Oriented Message Match Register(Y08) (T1)
Table 74 - Common Channel Signaling Map Register(Y0B) (T1)
Table 73 - Transmit Idle Code Register(Y0A) (T1)
Table 72 - Receive Idle Code Register(Y09) (T1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
Functional Description
Functional Description
Functional Description
123
Data Sheet