mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 151
mt9072av2
Manufacturer Part Number
mt9072av2
Description
Octal T1/e1/j1 Framer
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9072AV2.pdf
(275 pages)
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Bit
12
10
11
9
8
7
6
5
4
3
Name
F2HM
F2RM
F1HM
F1RM
F0HM
F3SM
F2EM
F2SM
F1EM
F1SM
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
Framer 3 Sync and Overflow Mask. This is the mask bit for the F3SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 HDLC Mask. This is the mask bit for the F2HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 Elastic Mask. This is the mask bit for the F2EVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 Rx Line Mask. This is the mask bit for the F2RVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 Sync and Overflow Mask. This is the mask bit for the F2SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 HDLC Mask. This is the mask bit for the F1HVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 Elastic Mask. This is the mask bit for the F1EVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 Rx Line Mask. This is the mask bit for the F1RVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 Sync and Overflow Mask. This is the mask bit for the F1SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 0 HDLC Mask. This is the mask bit for the F0HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Table 121 - Interrupt Vector 1 Mask Register (Address 902) (T1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
151
Data Sheet
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