mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 35

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

Pin Description (continued)
163-178
181-192
LQFP
193
194
195
196
Pin #
D9,B8,C8,
A8,D8,D7,
B9,A9,C9,
C12,D12,
C10,D10,
B7,C7,A7
A13,A14,
A15,A16,
B12,A12,
C11,D11,
A11,B11,
B10,A10
LBGA
D6
D6
B6
C6
A6
B6
D0-D15
A0-A11
Name
(WR)
(RD)
R/W
IRQ
CS
DS
Type
OH Interrupt Request. When zero, one or more of the eight framers in the
I/O Data 0 to 15. These 16 signals form the bidirectional data bus for the
I
I
I
I
I
I
non-multiplexed parallel processor interface. D15 is the most
significant bit.
Address 0 to 11. These 12 signals form the input address bus for the
non-multiplexed parallel processor interface. Bits A10 and A8
determine which of the eight framers is selected for read and write
operations, bit A11 being high and A8 to A10 being low selects all
eight framers for write operations. A11 and A8 being both high and A9
being low selects global control registers. A11 is the most significant
bit.
Chip Select. A zero enables the read and write functions of the
MT9072 parallel processor interface; all bidirectional data bus lines
(D0-D15) will operate normally. A one disables the read and write
functions of the parallel processor interface; all bidirectional data
bus lines (D0-D15) will be in a high impedance state.
Data Strobe. Data Strobe for Motorola mode (I/M=0). The MT9072
reads data from the address bus (A0-A11) on the falling edge of DS;
writes data to the bidirectional data bus (D0-D15) on the falling edge
of DS (processor read); reads data from the bidirectional data bus
(D0-D15) on the falling edge of DS (processor write). DS may be
connected to CS.
Read. Read for Intel type mode (I/M=1). The MT9072 reads data
from the address bus (A0-A11) on the falling edge of RD; writes data
to the bidirectional data bus (D0-D15) on the falling edge of RD
(processor read).
Read/Write. Read and Write for Motorola mode (I/M=0). A zero sets
the MT9072 bidirectional data bus lines (D0-D15) as inputs for a
processor write. A one sets the MT9072 bidirectional data bus lines
(D0-D15) as outputs (processor read).
Write. Write for Intel type mode (I/M=1).
from the address bus (A0-A11) on the falling edge of WR; reads data
from the bidirectional data bus (D0-D15) on the rising edge of WR
(processor write).
MT9072 has generated an interrupt request. When one, the MT9072
has not generated an interrupt request. IRQ is an open drain output
that should be connected to V
either high or low for this output pin to function.
Zarlink Semiconductor Inc.
MT9072
35
Description (see Notes 1 to 7)
DD
through a pull-up resistor. CS can be
The MT9072 reads data
Data Sheet