mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 187

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

15-12
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
11
10
9
8
7
6
5
4
3
2
1
0
Name
PCC7
PCC6
PCC5
PCC4
PCC3
PCC2
PCC1
PCC0
PEC7
PEC6
PEC5
PEC4
PEC3
PEC2
PEC1
PEC0
Name
PI10
#### not used.
PI11
PI9
PI8
PI7
PI6
PI5
PI4
PI3
PI2
PI1
PI0
Table 158 - PRBS Error Counter & PRBS CRC-4 Counter (R/W Address Y15) (E1)
Pseudo Random Bit Sequence (PRBS) Error Counter. These bits make up a counter which is
incremented for each pseudo random bit sequence (PRBS) (2
DSTo receive channels connected (ADSEQ=0 register address Y01, RRSTn=1 register address
Y90 to YAF) to the PRBS error detector. This counter is cleared with an overflow, a RESET
(RESET pin or RST bit), or may be set by writing the desired value to it. PEC0 is the least
significant bit (LSB). The lower byte and upper byte of register cannot be written to
independently.
Pseudo Random Bit Sequence (PRBS) CRC-4 Counter. These bits make up a counter which
is incremented for each received CRC-4 multiframe. This counter is cleared with an overflow, a
RESET (RESET pin or RST bit), or may be set by writing the desired value to it. PCC0 is the
least significant bit (LSB). The lower byte and upper byte of register cannot be written to
independently.
Phase Indicator. These 12 bits are an indication of the delay through the receive slip buffer
and the imminence of a receive frame slip. The read address is this register’s value plus 16 bits
and is updated when the write address is zero. The slip buffer contains 512 bits on 64 channels
(0 thru 63). The accuracy of this indicator is approximately 1/16 of a bit.
This bit indicates a 1 frame (32 timeslot or 256 bit) phase offset.
This bit indicates a 16 timeslot (128 bit) phase offset.
This bit indicates a 4 timeslot (64 bit) phase offset.
This bit indicates a 3 timeslot (32 bit) phase offset.
This bit indicates a 2 timeslot (16 bit) phase offset.
This bit indicates a 1 timeslot (8 bit) phase offset.
This bit indicates a 4 bit phase offset.
This bit indicates a 2 bit phase offset.
This bit indicates a 1 bit phase offset.
This bit indicates a 1/2 bit phase offset.
This bit indicates a 1/4 bit phase offset.
This bit indicates a 1/8 bit phase offset.
Table 157 - Phase Indicator Status (R Address Y14) (E1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
Functional Description
187
15
-1) error detected on any of the
Data Sheet