mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 48

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

5.2
The following Table shows the registers related to the E1 framing algorithm.
Register
Address
Y00
Y10
Y12
Y13
Y16
Y19
Y1A
Y24
Y11
E1 Framing
channel 16, bit 1
Channel#, Bit#
1(bit 6 to 0)-15
1, bit 7(MSB)
Alarm and Framing Control
Register
Synchronization and Alarm
Status Word.
CRC-4 Timers and CRC-4 Local
Status
Alarm and Multiframe signaling
Status
NFAS and FAS Status Register
Loss of basic frame
synchronization counter
CRC-4 Error Counter
FAS Bit Counter and FAS Error
Counter.
Sync,CRC-4,MAS Latched
Status Register
DSTi/DSTo
17-25
16
0
Register
Table 11 - Registers Related to Framing for MT9072 (E1)
Table 10 - G.802 ST-BUS to PCM24 Mapping (T1)
Zarlink Semiconductor Inc.
This is the main register for selection of the framing mode. The
specific bits for control of the framer are CSYN, AUTY, CRCM,
REFRM, MFRF and AUTC
This register provides the real time status of receive basic frame
synchronization and receive multiframe synchronization. All bits in
this status register are relevant to framing except the slip bits.
All bits except the 2 sec timer are related to the reception of the
CRC-4 pattern in timeslot 0.
This register reports alarms such as AIS, loss of signal and
Timeslot 16 and 0 remote alarms. The bits of relevance for
framing are KLVE, LOSS,AIS16, AIS,RAI,RMA1 to 4, Y bit.
This register shows the FAS and NFAS status such as RFA 2 to 8
and RNFA.
This counter increments by one every 125 usec when the BSYNC
status is set to 1.
This error counter is incremented for each calculated CRC-4
submultiframe error. The CRCS1 and CRCS2 (Y11 bit 1 and 2)
events increment this counter.
This register reflects the FAS bit errors and a combined FAS
pattern error.
This register represents the latched version of framing status bits
such as BSYNC. These bits are set by changes in the associated
real time bits.
Not mapped
Not mapped
MT9072
PCM24 bits
120 to 192
119 bits
193 bit
S-bit
48
Description
Timeslot 16
Timeslot 0
Function
last bit
S-bit
Data Sheet