mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 4

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

Common Channel Signaling Timeslot Assigner
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Access and Monitoring for National (Sa) Bits (E1 mode only)
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Slip Buffers
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Transmit Slip Buffer
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Receive Slip Buffer
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Selected 64 Kbit/s CCS channels (for V5.2 and GR-303) can be routed to/from an external multichannel
HDLC, using the CSTi/0 pins
In addition to the datalink functions, the Sa bits can be accessed using:
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Assignable to the ESF Facility Data Link or any
other channel
Operates at 4 kbit/s (FDL), 56 kbit/s or
Two-frame slip buffer capable of performing a
controlled slip. Intended for rate conversion in
the transmit direction
Programmable delay
Transmit slips are independent of receive slips
Indication of slip
Indication of slip direction
Two-frame slip buffer capable of performing a
controlled slip
Wander tolerance of 142 UI (92 µs) peak
Indication of slip
Indication of slip direction
64 kbit/s
Single byte register
Five byte transmit and receive national bit buffers
A maskable interrupt is generated on the change of state of any Sa bit
T1/J1 Mode
T1/J1 Mode
Zarlink Semiconductor Inc.
MT9072
4
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Receive Slip Buffer
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Indication of slip direction
Assignable to timeslot-0, bits Sa4~Sa8 or any
other timeslot
Operates at 4, 8, 12, 16 or 20 kbit/s (Sa bits)
or 64 kbit/s
Two-frame slip buffer capable of performing a
controlled slip
Wander tolerance of 208 UI peak-to-peak
Indication of slip
E1 Mode
E1 Mode
Data Sheet