mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 268

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

RXDL
PCM 30
Bit Cells
E2i
RxBF
(Output)
RxDLC - Note 2
(Output)
RxDLC - Note 3
(Output)
RxDL
(Output)
RxDLC - Note 2
(Output)
RxDLC - Note 3
(Output)
Note 1 - RxDLC output applies for every second frame (RxBF) pulse (250 us) only
Note 2 - Clock output provided by setting control bit DLCK=1 (register address Y08)
Note 3 - Enable output provided by clearing control bit DLCK=0 (register address Y08)
Note 4 - PCM Timeslot is with reference to RXDL Output. It is delayed 4 bits from RPOS/RNEG
Bit
Bit
Sa4 to Sa8 clocked in by External Device
Sa4 to Sa8 clocked in by External Device
Example B - 12 kbit/s clock output
Sa4, Sa7 and Sa8 clocked in by External Device
Example B - enable output
Sa4, Sa7 and Sa8 clocked in by External Device
Example A - 20 kbit/s clock output
Example A - enable output
7
7
Bit
6
Bit
6
Figure 69 - Receive Data Link Pin Functional Timing
Bit
5
Bit
5
Timeslot 31
Bit
4
Bit
4
Bit
3
Bit
3
Bit
2
Bit
2
Zarlink Semiconductor Inc.
Bit
Bit
1
1
MT9072
Bit
Bit
0
0
268
Bit
Bit
7
7
Bit
6
Bit
6
Bit
5
Bit
5
Timeslot 0
Bit
Sa4
Bit
4
Bit
Sa5
Bit
3
Bit
Sa6
Bit
2
Bit
Sa7
Bit
1
Bit
Bit
Sa8
0
Bit
7
Bit
7
Timeslot 1
Bit
6
Bit
6
Bit
5
Bit
5
Data Sheet
Bit
4
Bit
4