mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 129

• Manufacturer Part Number: mt9072av2
• Description: Octal T1/e1/j1 Framer
• Manufacturer: Zarlink Semiconductor

15-11
15-8
15-0
7-0
Bit
Bit
7-3
2-0
Bit
10
9
8
MFOOF15-0
PSM7-0
TxSBMSB
TxBC2 - 0
TxTS4 - 0
PS7-0
Name
TSLPD
Name
Name
TSLIP
Table 84 - PRBS Error Counter and CRC Multiframe Counter for PRBS(Y15) (T1)
(1)
#
PRBS Multiframe Counter.This counter is incremented for each received CRC multiframe.
It is cleared when the PRBS Error Counter is written to.
PRBS Error Counter.This counter is incremented for each PRBS error detected on any of
the receive channels connected to the PRBS error detector.
not used.
Transmit Slip. A change of state (i.e., 1-to-0 or 0-to-1) indicates that a transmit controlled
frame slip has occurred in the transmitter.
Transmit Slip Direction. If one, indicates that the last transmit frame slip resulted in a
repeated frame, i.e., the internally generated 1.544 MHz. transmit clock is faster than the
system clock (C4b). If zero, indicates that the last transmit frame slip resulted in a lost
frame, i.e., the internally generated 1.544 MHz. transmit clock is slower than network
clock. Updated on an TSLIP occurrence.
Transmit Slip Buffer MSB. The most significant bit of the Transmit Slip Buffer Delay
Word. If one, the delay through the transmit elastic buffer is greater than one frame in
length; if zero, the delay through the transmit elastic buffer is less than one frame in
length. This bit is reset whenever Transmit Set Delay Bits (register address YF7) - are
written to.
Transmit timeslot. A five bit counter that indicates the number of ST-BUS timeslots
between the transmit elastic buffer ST-BUS write frame boundary and the internal
transmit read frame boundary. The count is updated every 250 uS.
Transmit Bit Count. A three bit counter that indicates the number of ST-BUS bit times
there are between the transmit elastic buffer ST-BUS write frame boundary and the
internal read frame boundary. The count is updated every 250 uS.
Multiframes Out of Synchronization Counter. This 16 bit counter will be incremented
once for every multiframe (1.5 milliseconds in D4 mode, 3 milliseconds in ESF mode) in
which basic frame synchronization is lost. This counter presets to one upon reset. If
terminal frame synchronization is neverobtained, the MFOOF counter will keep
incrementing every 1.5 or 3 msec (ESF Mode)
Table 85 - Multiframe Out of Frame Counter(Y16) (T1)
Table 83 - Transmit Slip Buffer Status Word(Y14) (T1)
Zarlink Semiconductor Inc.
MT9072
129
Functional Description
Functional Description
Functional Description
Data Sheet