mt9072av2 Zarlink Semiconductor, mt9072av2 Datasheet - Page 220
mt9072av2
Manufacturer Part Number
mt9072av2
Description
Octal T1/e1/j1 Framer
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT9072AV2.pdf
(275 pages)
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Bit
9
8
7
6
5
4
3
2
1
0
Name
F6RM
F5HM
F5RM
F4HM
F4RM
F6SM
F5EM
F5SM
F4EM
F4SM
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
Framer 6 Rx LineMask. This is the mask bit for the F6RVS status bit in the Interrupt Vector
Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 6 Sync and Overflow Mask. This is the mask bit for the F6SVS status bit in the Interrupt
Vector Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 5 HDLC Mask. This is the mask bit for the F5HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 5 Elastic Mask. This is the mask bit for the F5EVS status bit in the Interrupt Vector
Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 5 Rx Line Mask. This is the mask bit for the F5RVS status bit in the Interrupt Vector
Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 5 Sync and Overflow Mask. This is the mask bit for the F5SVS status bit in the Interrupt
Vector Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 4 HDLC Mask. This is the mask bit for the F5HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 4 Elastic Mask. This is the mask bit for the F4EVS status bit in the Interrupt Vector
Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 4 Rx Line Mask. This is the mask bit for the F4RVS status bit in the Interrupt Vector
register(address 911). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 4 Sync and Overflow Mask. This is the mask bit for the F4SVS status bit in the Interrupt
Vector Register (address 911). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Table 197 - Interrupt Vector 2 Mask Register (R/W Address 903) (E1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
220
Data Sheet
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